1. Field of the Invention
The present invention relates to a multi-chip semiconductor device, and to an electronic appliance and a vehicle employing it.
2. Description of Related Art
FIG. 7 is a block diagram showing a conventional example of a motor driving device. As shown there, in the conventional motor driving device 200, a regulator IC 210 which generates an internal voltage Vreg from a supply voltage Vcc, a driver IC 220 which drives a motor 100 by being supplied with the supply voltage Vcc, and a microprocessor IC 230 which controls the driver IC 220 etc. in a comprehensive fashion by being supplied with the internal voltage Vreg are configured as separate ICs.
Examples of conventional technology related to what has just been mentioned are seen in Japanese Patent Application Publications Nos. 2005-86853 and 2012-105007.
In the conventional motor driving device 200 described above, each IC is furnished with a power muting function dedicated to it (a function for forcibly stopping the operation of the IC in the event of a power drop), so that in the event of a fault in the supply voltage Vcc or the internal voltage Vreg, protective operation is invoked on an IC by IC basis. However, to achieve enhanced stability of the entire system, furnishing each IC with a power muting function dedicated to it is insufficient; for example, when the supply voltage Vcc starts being supplied, an operation sequence needs to have been previously established such that, only after the microprocessor IC 230 becomes ready to operate, the driver IC 220 starts to operate.
Conventional methods for establishing the above-mentioned operation sequence include, for example, a configuration where the power muting for the different ICs are cancelled with shifted timing such that, after the power muting for the microprocessor IC 230 is cancelled, that for the driver IC 220 is cancelled; and a configuration where, while the operation of the microprocessor IC 230 is unstable, an enable signal EN is kept pulled up or down so that the enable signal EN remains at an operation-disabled-state logic level.
However, of these conventional methods, the former requires that the timing with which the power muting for the different ICs is cancelled be controlled with high accuracy with consideration given to signal delays among the ICs and other factors, and this complicates the designing of the circuit. On the other hand, the latter requires that the ICs be externally fitted with a discrete component (a pull-up or pull-down resistor), and this leads to an increased number of components and hence increased cost.